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  • 1 Computer Engineering Department, Mustansiriyah University, Baghdad, Iraq
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Abstract

Direct sequence spread spectrum (DSSS) communication systems offer huge performance focal points in perspective on their low probability of block, improved performance in multipath fading situations and their capacity to stay away from interference by spreading the signal over a wide bandwidth subsequently conveying the power. For the transmitted sequence to be effectively received and demodulated, the spreading sequence utilized at the receiver ought to be like that utilized in the transmitter. This paper uses MATLAB Simulink to show a technique for synchronizing the code clock at the receiver with the code clock at the transmitter. This fine arrangement procedure is known as code tracking.

Abstract

Direct sequence spread spectrum (DSSS) communication systems offer huge performance focal points in perspective on their low probability of block, improved performance in multipath fading situations and their capacity to stay away from interference by spreading the signal over a wide bandwidth subsequently conveying the power. For the transmitted sequence to be effectively received and demodulated, the spreading sequence utilized at the receiver ought to be like that utilized in the transmitter. This paper uses MATLAB Simulink to show a technique for synchronizing the code clock at the receiver with the code clock at the transmitter. This fine arrangement procedure is known as code tracking.

1 Introduction

Spread spectrum communications alludes to the system of taking the information bearing signal of a specific bandwidth and intentionally spreading it out on the frequency domain with the end goal that the signal currently involves a lot more extensive bandwidth [1, 2].

There are three primary techniques used in spread spectrum communications. Direct sequence spread spectrum (DSSS), frequency hopping spread spectrum, and time hopping spread spectrum. With each using a code that is pseudorandom in nature to accomplish the spreading [3, 4].

Every system of spreading the spectrum requires a technique for recuperating the transmitted signal. This requires the receiver to recuperate the spreading code timing from the received signal. The obtaining system brings the receiver and transmitter code sequences into coarse arrangement while tracking the system [5].

In DSSS system, spreading is accomplished by representing each bit of the original message sequence utilizing a few bits. This procedure is accomplished by utilizing a spreading code for this situation of a pseudo-noise (PN) sequence.

The PN sequence is XOR-ed with the message sequence. As an example, consider a situation where the PN sequences are produced at a frequency that is 10 times higher than the message frequency. For this situation, the message frequency will be spread by a factor of 10 after the XOR procedure. This step details the transmission process in a DSSS system [6, 7].

At the receiver, the transmitted signal is again XOR-ed utilizing a PN sequence that is like the one originally utilized at the transmitter. Along these lines the original message sequence can be recuperated.

1.1 Statement of problem and solution

Channel defects get the requirement for synchronization of the spreading sequence utilized at the transmitter, and the one utilized at the receiver. This makes the code synchronization steps of code acquisition and code tracking significant. In code acquisition, the PN sequence utilized at the transmitter and the one utilized at the receiver are brought to within one time period of the original spreading sequence. In code tracking, the PN sequence at the receiver that has just been brought to inside one time period of that utilized at the transmitter by code acquisition is additionally refined and its exactness is brought to within less than half of the time period of the code utilized at the transmitter [6, 7].

Practically code acquisition happens before code tracking after which code tracking is started. In affecting this entire procedure a special algorithm that starts the tracking phase when acquisition is accomplished is utilized.

The basis for code acquisition is correlating both the PN sequences utilized at the transmitter and the receiver and setting a threshold which once accomplished, acquisition is proclaimed to have happened. PN sequences are the best spreading sequences since as will be featured later they have maximum correlation when both PN sequences are in synchronization and minimum correlation which stays steady when the signals are out of synchronization [7].

The code acquisition procedure happens over a limited measure of time. At the point when longer PN sequences are utilized the acquisition time might be longer. So as to appreciate this reality, a concise depiction of what acquisition includes is essential.

During acquisition, the PN sequence received from the receiver is contrasted with the one that is utilized at the transmitter. If the correlation is below a set threshold, the PN sequence at the receiver is deferred by a single time period of the PN sequence. This procedure goes on recursively until a set threshold is achieved. When this threshold is achieved, acquisition is said to have happened [7].

The paper focuses on showing the methods for code tracking on DSSS systems. The tracking deals with correction of timing offsets and frequency offsets of the clock running the code generators. Some researches which deal with tracking of DSSS can be found in [7–11].

2 Design methodology

The tracking system is executed utilizing MATLAB Simulink. The complete model diagram is presented in Fig. 1, with each block clarified in the accompanying subsections.

Fig. 1.
Fig. 1.

System block diagram

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

The following are the specifications of the system designed.

  1. Data rate: 1 Kb/s.
  2. PN code rate: 32 KHz.
  3. PN code length: 7 bits (maximal linear code).
  4. Modulation type: equivalent baseband binary phase shift keying (BPSK).
  5. Acquisition method: serial search (dwell time scheme).
  6. Tracking method: delay locked loop (DLL).
  7. Processing gain: 15.05 dB.

2.1 Transmitter

The transmitter presented in Fig. 2 comprises of a data generator, a PN generator, a mixer and a baseband BPSK modulator. Since the modulation is performed in baseband, no radio frequency (RF) carrier is available, subsequently the detection of the signal in the receiver uses low pass filter.

Fig. 2.
Fig. 2.

Transmitter block diagram

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

2.1.1 Data generator

The data generator utilized is a Bernoulli data generator from the communication block set with a 50% probability of a zero and 50% probability of a one.

2.1.2 PN generator

The PN generator implemented had a minimal polynomial given by f x 1 x x. The PN is produced by utilizing three stages D Flip-Flop from Simulink-Extras with a two feedback taped at x and x, Ex-ORed to the input of the primary stage D Flip-Flop, so as to get 7 bit length maximal (2 1) as presented in Fig. 3.

Fig. 3.
Fig. 3.

PN generator

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

2.1.3 BPSK modulator

Here the signal is modulated using BPSK from the mixer. This converts the signal to bipolar with a reverse phase of either 0 or 180°.

2.2 Channel

The channel is displayed as an AWGN which is an additive white Gaussian noise channel. This models the channel as having defiling clamor being added to the signal during the time spent transmission.

2.3 Receiver

The receiver consists of active correlator, synchronization unit, baseband BPSK demodulator, and local PN code generator with a variable clock, as presented in Fig. 4

Fig. 4.
Fig. 4.

Receiver block diagram

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

2.3.1 Active correlator

It is comprised of a mixer and a fourth order Butterworth filter to de-spread the signal. The received signal is just de-spread when the locally produced PN sequence and the received PN code have a similar stage. The cutoff frequency of the filter is set to the data rate of 1 KHz. The executed active correlator is as presented in Fig. 5. The manual switch is utilized to gauge the performance when utilizing a digital filter and an integrator in the circuitry.

Fig. 5.
Fig. 5.

Active correlator

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

2.3.2 Synchronization unit

The synchronization unit consists of acquisition, tracking, voltage controlled oscillator (VCO), and search and lock control unit (SLCU).

The output of the active correlator is contrasted with a threshold level in acquisition, if the threshold is surpassed, no delay will be acquainted with the local PN generator clock. This will imply that initial course synchronization has been accomplished and tracking (fine synchronization) will be initiated. On the off chance that the threshold is not come to, local PN clock is delayed by half a chip, and the acquisition process is repeated. After acquisition has been made, SLCU starts tracking.

2.3.2.1 Acquisition

The block diagram used to execute acquisition (serial search) is as presented in Fig. 6. It comprises of a square law envelope detector, and an integrate and dump to identify the correlated signal energy at constant test time intervals (dwell time). The output of the integrator is then contrasted with the threshold voltage and if the threshold is surpassed, the phase of the local PN is revised and tracking will be started, else a phase update signal is sent by the SLCU to attempt and correct the phase offset.

Fig. 6.
Fig. 6.

Acquisition subsystem

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

2.3.2.2 Tracking

The tracking technique executed is the DLL method because of its simplicity of use and furthermore as it is very precise. The tracking loop comprises of two branches as presented in Fig. 7.

Fig. 7.
Fig. 7.

Tracking subsystem

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

The common input to the lower and higher branch is the input from the AWGN channel. The second input to the higher mixer is the output of the last flip flop of the Local PN generator (Early) whereas the second input to the lower mixer is the output of the second flip flop of the Local PN generator (Late).

The two branches include a mixer, a digital low pass Butterworth filter and a square law envelope detector. These recognize the energy of the late and the early signals coming into the branches at consistent dwell times.

The filter utilized had a sampling frequency of 64 KHz (Nyquist rate) and a cutoff frequency same as the data rate i.e. 1 KHz.

The summer at the output of the tracking loop subtracts the two signals to create an error signal.

2.3.2.3 Voltage controlled oscillator (VCO)

The error signal from the tracking loop drives the digital VCO so as it can correct the clock frequency of 32 KHz. The VCO runs at the frequency of the PN generator of the transmitter. The limiter is utilized to change over the sinusoid from the VCO to a square wave signal.

2.3.2.4 Search and lock control unit (SLCU)

The block diagram of the SLCU execution is as presented in Fig. 8. The clock delivers a pulse at half the chip period, i.e. 64 KHz which is upset and bolstered into the NAND gate so as to check the status of acquisition system. The NAND outputs either a HIT (acquisition has happened) in order to continue with tracking or not. On the off chance that there is no HIT, a phase reproduction is tried again until a HIT is gotten.

Fig. 8.
Fig. 8.

SLCU subsystem

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

The T Flip-flop is utilized to produce a half chip clock at every half chip period in the event that there is no HIT, i.e. speeding up the clock. The clock is gotten after modulo two additions of the VCO clock with the T-flip-flop output.

The last clock update will either be at the chip rate (normal speed) if acquisition happened or at half chip rate (local PN code quicker than the received PN code) if acquisition process is not arrived at it is the ultimate choice.

2.3.3 Local PN code generator

The local PN generator is planned like the PN generator in the transmitter aside from that the clock that runs it originated from the output of the SLCU. The early and late sequences are tapped as presented in Fig. 9.

Fig. 9.
Fig. 9.

Local PN generator

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

2.3.4 BPSK demodulator

The baseband BPSK demodulator from the communications block set with a log-likelihood-ratio decision mode is utilized. After demodulation, the signal is gone through an integrate and dump to stabilize it, at that point it is gone through a limiter to get a waveform that is bipolar with 2-ary (from –1 to 1) and afterward the signal is converted to unipolar to get the output of the entire system.

3 Results

3.1 Scenario 1: User data at 1 KHz

The outcome for the system with user data at 1 KHz and the spreading signal kept up at 32 KHz is presented in Fig. 10. It is seen that the received signal has errors during the early stages of tracking between 0 and 0.01 seconds yet after that the signals are the same.

Fig. 10.
Fig. 10.

User data at 1 KHz

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

3.2 Scenario 2: User data at 2 KHz

The outcome when the user frequency is acclimated to 2 KHz is presented in Fig. 11. The system tracks the signal regardless of whether the user frequency changes, this possibly occurs if the VCO quiescent frequency is acclimated to match the user frequency.

Fig. 11.
Fig. 11.

User data at 2 KHz

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

3.3 BER versus SNR

The performance of the system is explored by drawing bit error rate (BER) versus signal to noise ratios (SNR) with a digital filter as the correlator and with an integrator as the correlator. The resulting charts are presented in Fig. 12 utilizing a digital filter correlator and Fig. 13 utilizing an integrator. From the charts, it is clear that the integrator performs superior to the digital filter. Likewise, as the SNR is raised, the number of errors recorded diminished for a similar amount of sample time.

Fig. 12.
Fig. 12.

Graph of BER against SNR for a filter as correlator

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

Fig. 13.
Fig. 13.

Graph of BER against SNR for an integrator as correlator

Citation: International Review of Applied Sciences and Engineering IRASE 11, 2; 10.1556/1848.2020.20003

4 Conclusion

The goals of the paper were accomplished. DSSS systems were examined and the significance of code tracking was illustrated. The significance of an acquisition system was additionally illustrated. The system enables the receiver to adjust its clock frequency to match up the locally produced PN sequence with the received PN sequence. The tracking system averted errors by guaranteeing the two PN sequences do not leave synchronization with one another which would bring about lost signal. The tracking system took into account demodulation procedure to be progressively solid by permitting a bigger amount of signal energy to be received by the demodulator.

Acknowledgment

The authors thank Mustansiriya University for its full support of this work. It is one of the Iraqi public universities named after the Mustansiriya school, which was founded in the time of the Abbasids in Baghdad in 1233 by the Caliph Al-Mustansir Billah. It was an important scientific and cultural center. Located in the capital Baghdad. Includes 13 faculties. Founded in 1963. www.uomustansiriyah.edu.iq

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    W. Stallings, Data and Computer Communications, 8th ed. Upper Saddle River, NJ, Pearson Education Inc., 2007.

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    H. Zepernick and A. Finger, Pseudo Random Signal Processing, Theory and Application, John Wiley & Sons, 2005.

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    H. Omar, Tracking Loop of Direct Sequence Spread Spectrum Signals, B.Sc. Graduation Project, Kenya, University of Nairobi, 2016.

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    B. Agee, R. Kleinman, and J. Reed, “Soft synchronization of direct sequence spread-spectrum signals,” IEEE Trans. Commun., vol. 44, no. 11, pp. 15271536, 1996.

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    S. Curry, D. Schwartz, and J. Collins, “State transition assisted DSSS code synchronization,” in IEEE Military Communications Conference, USA, 1999.

    • Crossref
    • Search Google Scholar
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  • [10]

    B. Grundlehner, J. Haartsen, and S. Rajan, “Improved synchronization performance in DSSS systems using concatenated sequence,” in IEEE 7th Symp. on Spread-Spectrum Tech. and Appl., Czech Republic, 2002.

    • Crossref
    • Search Google Scholar
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    A. Tayebi, B. Stevan, and S. Akshya, “Performance analysis of chaotic DSSS-CDMA synchronization under jamming attack,” Circ. Syst. Signal Process., vol. 35, no. 12, pp. 43504371, 2016.

    • Crossref
    • Search Google Scholar
    • Export Citation
  • [1]

    B. Sklar, Digital Communications: Fundamentals and Applications, 2nd ed. Upper Saddle River, NJ, Prentice Hall PTR, 2009.

  • [2]

    W. Stallings, Data and Computer Communications, 8th ed. Upper Saddle River, NJ, Pearson Education Inc., 2007.

  • [3]

    M. Simon, J. Omura, R. Scholtz, and B. Levitt, Spread Spectrum Communications Handbook, Electronic ed. McGraw-Hill Inc., 2004.

  • [4]

    D. Torrieri, Principles of Spread Spectrum Communication Systems, Springer Science Business Media Inc., 2005.

  • [5]

    A. Viterbi, CDMA: Principles of Spread Spectrum Communications, Addison-Wesley Publishing Company, 1995.

  • [6]

    H. Zepernick and A. Finger, Pseudo Random Signal Processing, Theory and Application, John Wiley & Sons, 2005.

  • [7]

    H. Omar, Tracking Loop of Direct Sequence Spread Spectrum Signals, B.Sc. Graduation Project, Kenya, University of Nairobi, 2016.

  • [8]

    B. Agee, R. Kleinman, and J. Reed, “Soft synchronization of direct sequence spread-spectrum signals,” IEEE Trans. Commun., vol. 44, no. 11, pp. 15271536, 1996.

    • Crossref
    • Search Google Scholar
    • Export Citation
  • [9]

    S. Curry, D. Schwartz, and J. Collins, “State transition assisted DSSS code synchronization,” in IEEE Military Communications Conference, USA, 1999.

    • Crossref
    • Search Google Scholar
    • Export Citation
  • [10]

    B. Grundlehner, J. Haartsen, and S. Rajan, “Improved synchronization performance in DSSS systems using concatenated sequence,” in IEEE 7th Symp. on Spread-Spectrum Tech. and Appl., Czech Republic, 2002.

    • Crossref
    • Search Google Scholar
    • Export Citation
  • [11]

    A. Tayebi, B. Stevan, and S. Akshya, “Performance analysis of chaotic DSSS-CDMA synchronization under jamming attack,” Circ. Syst. Signal Process., vol. 35, no. 12, pp. 43504371, 2016.

    • Crossref
    • Search Google Scholar
    • Export Citation
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