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R. Santhi Department of Electrical and Electronics Engineering, Srinivasa Ramunujan Centre, Sastra Deemed University, Thanjavur, India

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A. Srinivasan Department of Electronics and Communications Engineering, Srinivasa Ramanujan Centre, Sastra Deemed University, Thanjavur, India

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Abstract

Multilevel inverters performance enhancement is a major topic, which has attracted the attention of most of the researchers, to evolve with newer topologies and modulation strategies. In this manuscript, two novel hybrid bidirectional multilevel inverter structures, which are suitable for bidirectional loads, are proposed. An enhancement in the voltage levels and reduction of the component count are achieved for these newly introduced structures. Modular expansion and series cascading are suggested systems for extension of the voltage levels. The prime requirement in most of the industrial drives is a controlled output. VSI fed induction motor drive satisfies this requirement. The Multicarrier PWM technique has been applied to the basic bidirectional seven level models and nine level model and its performance with induction motor as load has been analyzed for various modulation indices. The simulated results of the proposed structures are verified using MATLAB/SIMULINK platform. The characteristics such as stator current, rotor current speed and torque plots achieved as above model affirm that its performance is good. By then, the tracking time of the proposed work during reference speed change, load change and constant reference change is 0.185, 1.094 and 1.5 s. The tracking time of the VSI during reference speed change, load change and constant reference change is 0.5 s, 3.8 and 3.5 s. The tracking time of the MLI during reference speed change, load change and constant reference change is 0.2 s, 1.8 and 2 s.

Abstract

Multilevel inverters performance enhancement is a major topic, which has attracted the attention of most of the researchers, to evolve with newer topologies and modulation strategies. In this manuscript, two novel hybrid bidirectional multilevel inverter structures, which are suitable for bidirectional loads, are proposed. An enhancement in the voltage levels and reduction of the component count are achieved for these newly introduced structures. Modular expansion and series cascading are suggested systems for extension of the voltage levels. The prime requirement in most of the industrial drives is a controlled output. VSI fed induction motor drive satisfies this requirement. The Multicarrier PWM technique has been applied to the basic bidirectional seven level models and nine level model and its performance with induction motor as load has been analyzed for various modulation indices. The simulated results of the proposed structures are verified using MATLAB/SIMULINK platform. The characteristics such as stator current, rotor current speed and torque plots achieved as above model affirm that its performance is good. By then, the tracking time of the proposed work during reference speed change, load change and constant reference change is 0.185, 1.094 and 1.5 s. The tracking time of the VSI during reference speed change, load change and constant reference change is 0.5 s, 3.8 and 3.5 s. The tracking time of the MLI during reference speed change, load change and constant reference change is 0.2 s, 1.8 and 2 s.

1 Introduction

The future era of power electronics is focused on energy conservation so as to attain a pollution free environment by adopting energy efficient power modulators for power conversion. Multilevel inverters have become an integral component of the power electronic system. Multilevel inverter has been used in a variety of applications which include high speed adjustable drives, FACTS devices for reactive power compensation, battery powered vehicles and for grid integration [1–8]. FACTS devices means powerelectronic components used for Flexible AC transmission. Because of its ever increasing applications, the performance improvement of multilevel inverter had been most essential criterion and it attracted many researchers towards introducing newer topologies and control techniques [9–11].

In conventional inverters losses and the output voltage harmonic content were found to be too high so multilevel inverter has emerged as an alternative to address this issue and also to attain high voltage levels. The role of MLI is to synthesize a stepped waveform output voltage with better quality and lesser THD. As the number of stages maximizes, the harmonic content decreases significantly in output voltage step waveform [12].

The three major classical topologies of MLI are clamped diode [13, 14], flying capacitor [15, 16], and cascade type [17, 18]. The requirement of a large number of diodes at neutral point and neutral point voltage balance problems are the drawbacks and in flying capacitor the need of many storage capacitors and capacitor voltage balancing issue were the demerits. In case of cascaded H-bridge, the requirement of many isolated sources has been a major drawback. In spite of its disadvantage it is more widely used owing to its modularity and its structure is devoid of passive energy storing devices.

Increased switch count and its related gate driver circuits and protection circuit were the main disadvantages of multilevel inverters. To overcome these issues many researchers have suggested newer topologies with innovative ideas [19–22]. Many derived structures like artificial neutral point clamped derived from NPC converter and packed U cell converter derived from FC with component reduction have been introduced [23].

Several hybrid topologies which combine two topologies have emerged. Cascaded multilevel inverter with sub multilevel inverters and modular multilevel converter were among the emerging structures which have been recently introduced [24]. Hybrid inverters mainly consist of two sub-circuits. One basic circuit generates the required positive levels and the other circuit functions as a polarity reversal circuit which is an H-bridge circuit [25–29].

A space-vector-modulated pulse width-modulation (PWM) scheme has been suggested for the power circuit topology proposed. With this PWM scheme, a total of 64 space-vector combinations are possible, distributed over 19 space-vector locations. A further improvisation is suggested, in which two two-level inverters with unequal dc-link voltages (which are in the ratio 2:1), feed an open-end winding induction motor. It has been shown that this configuration is capable of achieving four-level inversion. The total number of space-vector locations produced in this scheme is enhanced to 37. A reduction in the switching ripple is achieved with this scheme, compared to the former, as the number of constituent sectors is enhanced to 54, compared to 24 with the former. Mohammad Rezaei et al., [30] have illustrated a new cascaded switched-capacitor multilevel inverters (CSCMLIs) using two modules containing asymmetric DC sources to generate 13 levels. Dyanamina and Kakodia [31] have performed to improve the speed response; a compensating voltage component is supplemented by an amending integrator.

The rest of the paper is organized as follows: Section 2 shows the operation of the basic topology. Section 3 describes the simulation and experimental results and analysis for the hybrid structures. Section 4 provides the conclusion of the research paper.

2 Operation of the basic topology

The basic unit which is a seven level bidirectional MLI model as referred by Samsamietal is demonstrated [9, 32–35] in Fig. 1.

Fig. 1.
Fig. 1.

Seven Level bidirectional MLI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

This structure is capable of supplying inductive loads with bidirectional current. The basic circuit comprises of seven IGBT switches. Out of these six switches are unidirectional and one switch is bidirectional. The operation of this circuit is described by a switching table as indicated in Table 1 for symmetrical voltage selection. When S5 is on and S6/S7 and S8 are off it produces level 1 with E1 as output voltage. When S6 is on and S5 and S8 are off then it produces E1 + E2 as output voltage. WhenS8 is on and S5 and S6/S7 are off it produces E1 + E2 + E3 as the output voltage [36–40]. An output voltage waveform for seven level circuits is shown in Fig. 1. With asymmetrical voltage selection by suitable relationship of voltages the number of output stages could be extended to nine. The nine level models can also be obtained by modular expansion method by including one more voltage source and a bidirectional switch, as indicated in Fig. 2 [41–44] and their output voltage waveform is demonstrated in Figs 3 and 4.

Table 1.

Switching sequence of basic 7L BMLI

S1S2S3S4S5S6/S7S8Load Voltage VAB(t)
11000000
1010100vdc
10100102Vdc
10100013Vdc
00110000
0101100–Vdc
0101010–2Vdc
0101001–3Vdc
Fig. 2.
Fig. 2.

Nine level bidirectional MLI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 3.
Fig. 3.

Output voltage waveform of 7L BMLI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 4.
Fig. 4.

Output voltage waveform of 9L BMLI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

2.1 Level extension methods

Modular expansion, normal and staircase layer are processes of increasing the output levels. Table 2 shows the component requirement and source requirement for specific levels using modular expansion.

Table 2.

Modular expansion method

S. NoNo of unidirectional switchesNo of bidirectional switchesNo of levels (N) V0 = 2 *M + 1No of Sources (M)
16173
26294
363115
464136

2.2 Cascading basic units with H-bridge circuit

By cascading the basic 7L unit with H-bridge circuit with E1 = E2 = E3 = 1 Vdc and E4 voltage as 7vdc as illustrated in Fig. 5, it is able to produce 21 level output. If a nine level circuit is cascaded with H-bridge circuit with E1 = E2 = E3 = 1Vdc and E4 voltage as 9Vdc, it is able to produce 27 level output voltage as depicted in Fig. 6.

Fig. 5.
Fig. 5.

Proposed hybrid structure 1 (7L basic unit cascaded with H-bridge circuit)

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 6.
Fig. 6.

Proposed hybrid structure 2 (9L basic unit cascaded with H-bridge circuit)

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

2.3 Cascading of basic unit with another basic unit

When 7L basic unit is cascaded with another unit, both have voltages as symmetric with E1 = E2 = E3 = Vdc it produces thirteen level output. If asymmetric method is chosen still more increase in levels is achieved. When the first 7L basic unit is having E1 = E2 = E3 = Vdc and the cascading unit is having E4 = E5 = E6 = 7Vdc as illustrated in Fig. 7, it is probable to create 49Level output waveform. As the voltage levels increase, the harmonic content in output voltage waveform is reduced. Some of the ways to cascade with the base circuit for maximizing the number of stages is represented in Table 3 and component comparison with CHB MLI is suggested in Table 4.

Fig. 7.
Fig. 7.

Proposed hybrid structure by cascading basic units witch dc sources ratio (1:7)

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Table 3.

Extension of levels by cascading basic circuit

S. NoVarious cascading methods using symmetric structuresDC sources ratioNo of unidirectional switchesNo of bidirectional switchesNo of level (N)No of sources (M)
1Basic unit and one H-bridge01:07101214
2Basic unit and two H-bridges01:07:07141355
3Basic unit 1 and basic unit 201:07122496
Table 4.

Component comparison of the 49L HBMLI with CHB symmetrical MLI

ParametersCHB symmetricalProposed bidirectional topology
No of H-bridges240 (instead it needs another basic unit in series)
No of Dc sources246
No of switches9616
No of output levels4949

3 Simulation and experimental results and analysis for the hybrid structures

The output voltage waveform for 21L circuit obtained by cascading a single phase 7L basic unit cascaded with H-bridge circuit with RL load with R = 100Ω and L = 50 mH is indicated in Fig. 8. The THD content on output voltage waveform found to be 3.90 as depicted in Fig. 9.

Fig. 8.
Fig. 8.

21Level hybrid BMLI output voltage

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 9.
Fig. 9.

Voltage harmonic spectrum of 21L hybrid BMLI current waveform

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

An output voltage waveform for 49L circuit obtained by cascading a single phase 7L basic unit1 with similar 7L basic unit2 in asymmetric topology with DC voltage distribution ratio of the sources in the ratio 1:7 with R load with R L load are illustrated in Figs 10 and 11. An output obtained from the basic unit and the cascaded units are shown in Figs 12 and 13. The FFT analysis is demonstrated in Fig. 14 and THD content on output voltage waveform is found to be 2.88.

Fig. 10.
Fig. 10.

Output voltage waveform of 49L HBMI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 11.
Fig. 11.

Output current waveform of 49L HBMLI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 12.
Fig. 12.

Output voltage waveform of basic unit 1

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 13.
Fig. 13.

Output voltage waveform of basic unit 2

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 14.
Fig. 14.

Voltage harmonic spectrum of 49L HBMI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

The 21L HBMLI is tested using three phase induction motor model available in MALAB Simulink as the load and its performance characteristics like stator current, rotor current, speed, torque are analyzed. The twenty-one level three phase bidirectional MLI fed induction motor model diagram using MATLAB/Simulink is illustrated by Fig. 15a. Circuit assembly subsystem of Seven level BMLI is shown in Fig. 15b. PDPWM Subsystem is given in Fig. 15c. The performance characteristics of the 21level HBMLI like speed, stator current, torque, rotor current are presented in Fig. 16, Figs 17 and 19 and the phase voltages are shown in Fig. 18.

Fig. 15a.
Fig. 15a.

Twenty one levels HBMLI fed induction motor drive

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 15b.
Fig. 15b.

Circuit assembly subsystem of seven level BMLI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 15c.
Fig. 15c.

PDPWM subsystem

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 16.
Fig. 16.

Speed, torque characteristics of twenty one level HBMLI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 17.
Fig. 17.

Stator current characteristics of twenty-one level HBMLI

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 18.
Fig. 18.

Twenty-one HBMLI phase voltages

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 19.
Fig. 19.

21 level three phase HBMLI fed induction motor drive phase currents

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Simulink model three phase induction motor (asynchronous motor) of 5.4 H.P, 400 V, 50 Hz and 1430 RPM rated speed has been chosen from Simulink library. PDPWM control technique is applied by selecting modulation index as 1.0 and switching frequency of IGBT is selected 1 kHz and that of modulating wave is 50 Hz respectively. Even though various speed control methods are available for induction motor v/f speed control technique is the mostly preferred one due to its characteristics such as good transient and dynamic performance. It also provides good speed control range and it is easier to implement.

For authenticating the efficiency of 7L BMLI, the induction motor is worked in the range with a standard V/F mode (0 < mi < 1) with varying modulation indexes and its readings are tabulated in Table 5.

Table 5.

Performance of three phase 9-level BMLI fed induction motor at no load

Modulating wave for PDPWMM.IThree phase induction motor fed with 9-level CHBMLI
V line in Volts%THDVAN in Volts
Sine wave1493.311.73285.5
0.839614,3229.7
0.630122.07174.6
0.420835.63121.2

Seven level BMLIs in dissimilar modulation codes (0.4, 0.6, 0.8 and 1.0) are recommended on Figs 2023. The variation of modulation index modifies the number of stages. The stator currents are nearly sinusoidal for all cases of M.I values and the stator current for M.I = is shown in Fig. 24.

Fig. 20.
Fig. 20.

Line voltage VAB for M.I = 1 using PDPWM at switching frequency as 1 kHz

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 21.
Fig. 21.

Line voltage VAB for M.I = 0.8 using PDPWM at switching frequency as 1 kHz

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 22.
Fig. 22.

Line voltage VAB for M.I = 0.6 using PDPWM at switching frequency as 1 kHz

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 23.
Fig. 23.

Line voltage VAB for M.I = 0.6 using PDPWM at switching frequency as 1 kHz

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 24.
Fig. 24.

Stator current of BMLI fed induction motor when M.I = 1

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

The performance of the 9 BMLI has been verified by operating the induction motor by varying the modulation index in the range (0 < M.I < 1) with standard V/f mode and its readings are tabulated in Table 6. The line and phase voltage of nine stages BMLI are demonstrated in Figs 25 and 26.

Table 6.

Performance of three phase 7-level BMLI fed induction motor at no load

Modulating wave for PDPWMM.IThree phase induction motor fed with 7-level HBMLI
V line in Volts%THDVAN in Volts
Sine wave1371.815.06215.7
0.830122.10174.6
0.6230.129.9134.2
0.4157.338.1392.87
Fig. 25.
Fig. 25.

Phase voltage van with M.I = 1 and switching frequency 1 kHz using PDPWM technique

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Fig. 26.
Fig. 26.

Line voltage VAB with M.I = 1 and switching frequency 1 kHz using PDPWM technique

Citation: International Review of Applied Sciences and Engineering 14, 2; 10.1556/1848.2022.00441

Table 7 explains the efficiency of the conventional and proposed topology. The proposed topology affirms the best result over the conventional topology. The efficiency values of the proposed topology are 99.003% (Table 8). Table 8 shows that the proposed hybrid structure is robust under changing load conditions.

Table 7.

Efficiency for various topologies

Various topologiesEfficiency obtained (%)
Proposed technique99.003
H-bridge topology80.343
Flying capacitor topology75.603
Neutral point clamped (NPC) topology55.893
Table 8.

Tracking time response of IM

Power converterReference speed changeLoad changeConstant reference change
Tracking timeTracking timeTracking time
VSI [45]0.5 s3.8 s3.5 s
MLI [45]0.2 s1.8 s2 s
Hybrid Bidirectional Multilevel Inverter Structure0.185 s1.094 s1.5 s

4 Conclusion

In this manuscript two novel hybrid bidirectional MLI configurations are proposed. The simulated results are obtained for 21L and 27L for the proposed structures by series cascading with level doubling network. The simulated results are verified for 49L and 81L output, which are synthesized using series cascading method with two similar basic units. All these hybrid BMLI structures produced output with lesser voltage harmonic content. The simulated results of the three phase 21LHBMLIMATLAB SIMULINK model with induction motor as the load is verified. Certainly, these hybrid BMLI structures with increased output voltage levels and minimized THD would be well suited for medium powered AC drive applications. The efficiency of the NPC topology, flying capacitor, H-bridge topology and proposed topology is 55.893%, 75.603%, 80.343% and 99.003%. Further, this research is prospective to future research in the area of high quality energy transfer using power converters.

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    E. Babaei, M. FarhadiKangarlu, and M. Hosseinzadeh, “Asymmetrical multilevel converter topology with reduced number of components,” IET Power Electron., vol. 6, no. 6, pp. 11881196, 2013. https://doi.org/10.1049/iet-pel.2012.0497.

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    H. Samsami, A. Taheri, and R. Samanbakhsh, “New bidirectional multilevel inverter topology with staircase cascading for symmetric and asymmetric structures,” IET Power Electron., vol. 10, no. 11, pp. 13151323, 2017. https://doi.org/10.1049/iet-pel.2016.0956.

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    R. Raushan, B. Mahato, and K. Jana, “Comprehensive analysis of a novel three‐phase multilevel inverter with minimum number of switches,” IET Power Electron., vol. 9, no. 8, pp. 16001607, 2016. https://doi.org/10.1049/iet-pel.2015.0682.

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    J. Rodriguez, S. Bernet, B. Wu, J. Pontt, and S. Kouro, “Multilevel voltage-source-converter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 29302945, 2007. https://doi.org/10.1109/tie.2007.907044.

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    S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, J. Rodriguez, M. A. Pérez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 25532580, 2010. https://doi.org/10.1109/tie.2010.2049719.

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    B. P. McGrath and D. Holmes, “Multicarrier PWM strategies for multilevel inverters,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 858867, 2002. https://doi.org/10.1109/tie.2002.801073.

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  • [45]

    A. Chitra, W. Razia Sultana, J. Vanishree, S. Sreejith, S. Jose, and A. J. Pulickan, “Performance comparison of multilevel inverter topologies for closed loop v/f controlled induction motor drive,” Energ. Proced., vol. 117, pp. 958965, 2017.

    • Search Google Scholar
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Senior editors

Editor-in-Chief: Ákos, LakatosUniversity of Debrecen, Hungary

Founder, former Editor-in-Chief (2011-2020): Ferenc Kalmár, University of Debrecen, Hungary

Founding Editor: György Csomós, University of Debrecen, Hungary

Associate Editor: Derek Clements Croome, University of Reading, UK

Associate Editor: Dezső Beke, University of Debrecen, Hungary

Editorial Board

  • Mohammad Nazir AHMAD, Institute of Visual Informatics, Universiti Kebangsaan Malaysia, Malaysia

    Murat BAKIROV, Center for Materials and Lifetime Management Ltd., Moscow, Russia

    Nicolae BALC, Technical University of Cluj-Napoca, Cluj-Napoca, Romania

    Umberto BERARDI, Toronto Metropolitan University, Toronto, Canada

    Ildikó BODNÁR, University of Debrecen, Debrecen, Hungary

    Sándor BODZÁS, University of Debrecen, Debrecen, Hungary

    Fatih Mehmet BOTSALI, Selçuk University, Konya, Turkey

    Samuel BRUNNER, Empa Swiss Federal Laboratories for Materials Science and Technology, Dübendorf, Switzerland

    István BUDAI, University of Debrecen, Debrecen, Hungary

    Constantin BUNGAU, University of Oradea, Oradea, Romania

    Shanshan CAI, Huazhong University of Science and Technology, Wuhan, China

    Michele De CARLI, University of Padua, Padua, Italy

    Robert CERNY, Czech Technical University in Prague, Prague, Czech Republic

    Erdem CUCE, Recep Tayyip Erdogan University, Rize, Turkey

    György CSOMÓS, University of Debrecen, Debrecen, Hungary

    Tamás CSOKNYAI, Budapest University of Technology and Economics, Budapest, Hungary

    Anna FORMICA, IASI National Research Council, Rome, Italy

    Alexandru GACSADI, University of Oradea, Oradea, Romania

    Eugen Ioan GERGELY, University of Oradea, Oradea, Romania

    Janez GRUM, University of Ljubljana, Ljubljana, Slovenia

    Géza HUSI, University of Debrecen, Debrecen, Hungary

    Ghaleb A. HUSSEINI, American University of Sharjah, Sharjah, United Arab Emirates

    Nikolay IVANOV, Peter the Great St. Petersburg Polytechnic University, St. Petersburg, Russia

    Antal JÁRAI, Eötvös Loránd University, Budapest, Hungary

    Gudni JÓHANNESSON, The National Energy Authority of Iceland, Reykjavik, Iceland

    László KAJTÁR, Budapest University of Technology and Economics, Budapest, Hungary

    Ferenc KALMÁR, University of Debrecen, Debrecen, Hungary

    Tünde KALMÁR, University of Debrecen, Debrecen, Hungary

    Milos KALOUSEK, Brno University of Technology, Brno, Czech Republik

    Jan KOCI, Czech Technical University in Prague, Prague, Czech Republic

    Vaclav KOCI, Czech Technical University in Prague, Prague, Czech Republic

    Imre KOCSIS, University of Debrecen, Debrecen, Hungary

    Imre KOVÁCS, University of Debrecen, Debrecen, Hungary

    Angela Daniela LA ROSA, Norwegian University of Science and Technology, Trondheim, Norway

    Éva LOVRA, Univeqrsity of Debrecen, Debrecen, Hungary

    Elena LUCCHI, Eurac Research, Institute for Renewable Energy, Bolzano, Italy

    Tamás MANKOVITS, University of Debrecen, Debrecen, Hungary

    Igor MEDVED, Slovak Technical University in Bratislava, Bratislava, Slovakia

    Ligia MOGA, Technical University of Cluj-Napoca, Cluj-Napoca, Romania

    Marco MOLINARI, Royal Institute of Technology, Stockholm, Sweden

    Henrieta MORAVCIKOVA, Slovak Academy of Sciences, Bratislava, Slovakia

    Phalguni MUKHOPHADYAYA, University of Victoria, Victoria, Canada

    Balázs NAGY, Budapest University of Technology and Economics, Budapest, Hungary

    Husam S. NAJM, Rutgers University, New Brunswick, USA

    Jozsef NYERS, Subotica Tech College of Applied Sciences, Subotica, Serbia

    Bjarne W. OLESEN, Technical University of Denmark, Lyngby, Denmark

    Stefan ONIGA, North University of Baia Mare, Baia Mare, Romania

    Joaquim Norberto PIRES, Universidade de Coimbra, Coimbra, Portugal

    László POKORÁDI, Óbuda University, Budapest, Hungary

    Roman RABENSEIFER, Slovak University of Technology in Bratislava, Bratislava, Slovak Republik

    Mohammad H. A. SALAH, Hashemite University, Zarqua, Jordan

    Dietrich SCHMIDT, Fraunhofer Institute for Wind Energy and Energy System Technology IWES, Kassel, Germany

    Lorand SZABÓ, Technical University of Cluj-Napoca, Cluj-Napoca, Romania

    Csaba SZÁSZ, Technical University of Cluj-Napoca, Cluj-Napoca, Romania

    Ioan SZÁVA, Transylvania University of Brasov, Brasov, Romania

    Péter SZEMES, University of Debrecen, Debrecen, Hungary

    Edit SZŰCS, University of Debrecen, Debrecen, Hungary

    Radu TARCA, University of Oradea, Oradea, Romania

    Zsolt TIBA, University of Debrecen, Debrecen, Hungary

    László TÓTH, University of Debrecen, Debrecen, Hungary

    László TÖRÖK, University of Debrecen, Debrecen, Hungary

    Anton TRNIK, Constantine the Philosopher University in Nitra, Nitra, Slovakia

    Ibrahim UZMAY, Erciyes University, Kayseri, Turkey

    Andrea VALLATI, Sapienza University, Rome, Italy

    Tibor VESSELÉNYI, University of Oradea, Oradea, Romania

    Nalinaksh S. VYAS, Indian Institute of Technology, Kanpur, India

    Deborah WHITE, The University of Adelaide, Adelaide, Australia

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Materials Science (miscellaneous) (Q3)
Scopus  
Scopus
Cite Score
2.3
Scopus
CIte Score Rank
Architecture (Q1)
General Engineering (Q2)
Materials Science (miscellaneous) (Q3)
Environmental Engineering (Q3)
Management Science and Operations Research (Q3)
Information Systems (Q3)
 
Scopus
SNIP
0.751


International Review of Applied Sciences and Engineering
Publication Model Gold Open Access
Online only
Submission Fee none
Article Processing Charge 1100 EUR/article
Regional discounts on country of the funding agency World Bank Lower-middle-income economies: 50%
World Bank Low-income economies: 100%
Further Discounts Limited number of full waivers available. Editorial Board / Advisory Board members: 50%
Corresponding authors, affiliated to an EISZ member institution subscribing to the journal package of Akadémiai Kiadó: 100%
Subscription Information Gold Open Access

International Review of Applied Sciences and Engineering
Language English
Size A4
Year of
Foundation
2010
Volumes
per Year
1
Issues
per Year
3
Founder Debreceni Egyetem
Founder's
Address
H-4032 Debrecen, Hungary Egyetem tér 1
Publisher Akadémiai Kiadó
Publisher's
Address
H-1117 Budapest, Hungary 1516 Budapest, PO Box 245.
Responsible
Publisher
Chief Executive Officer, Akadémiai Kiadó
ISSN 2062-0810 (Print)
ISSN 2063-4269 (Online)

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